Dip soldering solderability testing is a standardized evaluation method used to determine how effectively molten solder wets the metallic surfaces of electronic components, leads, and printed circuit boards under controlled conditions. Governed by internationally recognized standards such as IEC 60068-2-20 and J-STD-002/J-STD-003, the test simulates real wave soldering and reflow processes to reveal non-wetting, dewetting, and plating defects before products reach mass production. This article explains the test principle, sample types, procedures, evaluation criteria, and typical applications of the dip soldering solderability test.
Technical Overview
The dip soldering solderability test is a fundamental quality-control and qualification technique in electronics manufacturing. It assesses the ability of a solderable surface—such as a component lead, a surface-mount termination, or a printed circuit board finish—to be wetted promptly and uniformly by molten solder. In the test, a prepared and fluxed specimen is immersed into a molten solder bath at a defined temperature and speed, held for a specified dwell time, and then withdrawn for visual inspection of the wetted surface.
The test essentially reproduces the essential physics of wave soldering and dip soldering assembly processes: capillary flow, intermetallic formation, and wetting driven by surface tension. A surface that wets well in the laboratory test can be expected to form reliable solder joints in production, whereas poor wetting indicates oxidation, contamination, insufficient or porous plating, or finish degradation during storage.
The dip method is described in several major standards, including IEC 60068-2-20 (Environmental testing – Test T: solderability), IEC 60068-2-54 and IEC 60068-2-58 (wetting balance methods for leaded and surface-mount devices), J-STD-002 (solderability tests for component leads and terminations), J-STD-003 (solderability tests for printed boards), IPC-TM-650 test methods, MIL-STD-883 Method 2003, and MIL-STD-202 Method 208. Together these documents define solder composition, bath temperature, immersion speed, dwell time, flux type, preconditioning, and acceptance criteria.
Testing Samples
Printed Circuit Boards and Bare Board Finishes
Bare printed circuit boards are tested using the edge-dip method described in J-STD-003. Representative coupons or board edges carrying the production finish—such as HASL, ENIG, immersion tin, immersion silver, or OSP—are fluxed and dipped into the molten solder to evaluate pad wetting and plated-through-hole filling.
Component Leads and Through-Hole Terminations
Leaded components, including axial and radial parts, IC leadframes, transformer pins, and connector lugs, are tested per J-STD-002 or MIL-STD-883 Method 2003. The dipped length of each lead is inspected for wetting coverage and plating quality.
Surface-Mount Component Terminations
Chip resistors, capacitors, QFP gull-wing leads, and BGA balls or pads can be evaluated by dipping their metallized terminations or by the wetting balance method of IEC 60068-2-58, which quantifies wetting speed and force for small geometries.
Wires, Cables, and Stamped Terminals
Tinned wires and stamped or formed terminals are commonly evaluated with the solder globule test of IEC 60068-2-20, in which a small pellet of molten solder at 235°C must flow around the wire within a defined time to demonstrate acceptable solderability.
Testing Items
Depending on the specimen and the governing standard, the dip soldering test evaluates the following characteristics:
- Percentage of the dipped area covered by new, bright, continuous solder, with a typical acceptance requirement of at least 95% coverage.
- Presence of non-wetting, where molten solder fails to adhere and base metal remains exposed.
- Presence of dewetting, where solder initially wets but recedes, leaving irregular mounds and exposed areas.
- Pinholes, voids, blisters, and inclusions in the solder coating that indicate plating porosity or contamination.
- Hole-filling and capillary rise in plated through-holes, confirming that molten solder wicks up the barrel and wets the hole wall.
- Integrity of the surface finish after thermal exposure, such as black pad, interfacial voids, or excessive intermetallic growth on ENIG finishes.
- Optional quantitative parameters from the wetting balance method, including wetting time, zero-cross time, and maximum wetting force.
Testing Methods
Sample Preparation and Preconditioning
Specimens are handled with clean gloves or tweezers to avoid skin-oil contamination and are cleaned, if permitted by the standard, with isopropanol to remove loose soils. To simulate natural aging during storage, many specifications require steam-aging preconditioning before the solderability test; J-STD-002 defines graded conditioning levels, including one-hour and eight-hour steam-aging exposures, with the more severe levels used to demonstrate robust, long shelf-life solderability.
Flux Application
A controlled amount of flux is applied by dipping the test area into the flux for several seconds and allowing excess flux to drain. Most dip and look procedures specify a mildly activated rosin flux of type ROL1 per J-STD-004, typically a solution of approximately 25% rosin by mass in isopropanol. Flux consistency, activity, and coverage strongly influence test repeatability, so bath life and contamination limits must be controlled.
Solder Bath Parameters and Dip Procedure
The molten solder bath conditions are the core variables of the test:
- Solder alloy: eutectic Sn63Pb37 or near-eutectic tin-lead for legacy processes, and SAC305 (Sn96.5Ag3.0Cu0.5) or similar alloys for lead-free processes.
- Bath temperature: commonly 235°C for tin-lead testing per IEC 60068-2-20, with dip-and-look component tests typically specified between 215°C and 245°C depending on the governing document; lead-free PCB edge-dip tests are commonly run at approximately 255°C.
- Immersion speed: controlled to roughly 25 mm/s in board-level edge-dip tests so that flux activation and wetting occur uniformly along the dipped edge.
- Dwell time: typically two to five seconds, long enough for complete wetting but short enough to avoid dissolution of thin platings or thermal damage.
- Withdrawal and cooling: the specimen is removed vertically at a controlled speed and allowed to cool in still air so that the solder meniscus freezes in its natural wetted shape.
Inspection and Acceptance Criteria
After cooling and removal of flux residues with isopropanol, the dipped surfaces are examined under magnification, typically 10x, with bright, diffuse illumination. The standard acceptance criteria require that at least 95% of the critical dipped area be covered by a continuous, smooth, new solder coating; any defects such as pinholes, non-wet spots, or dewetted areas must not exceed 5% of the area and must not be concentrated in a single location or expose base metal. For plated through-holes, the solder must visibly wet the hole walls and land areas, demonstrating capillary filling capability. Failure to meet these criteria constitutes a solderability rejection.
Applications
Dip soldering solderability testing is applied throughout the electronics supply chain and product life cycle:
- Incoming quality control of purchased components and bare printed circuit boards before they are committed to production lines.
- Qualification and periodic monitoring of plating lines, surface finishes, and PCB fabrication processes.
- Shelf-life studies and storage-condition assessment, in which steam-aged samples are tested to predict solderability after extended warehousing.
- Failure analysis and root-cause investigation of production soldering defects such as icicling, bridging, insufficient hole fill, and cold joints.
- Verification of lead-free transition, comparing wetting performance of new alloys and finishes against legacy tin-lead baselines.
- Support of process validation and reliability documentation for automotive, aerospace, medical, telecommunications, and consumer electronics programs, where accredited third-party laboratories frequently perform the tests to the applicable IEC, IPC, MIL, EN, or JIS standards.
FAQ
What is the difference between the dip and look method and the wetting balance method? The dip and look method is a qualitative pass/fail test in which a fluxed specimen is dipped in molten solder and inspected visually for coverage. The wetting balance method, described in IEC 60068-2-54 and IEC 60068-2-58, immerses the specimen in the solder bath while continuously measuring the vertical force on it, producing quantitative curves of wetting time and wetting force that allow tighter numerical acceptance limits.
Why is steam aging performed before the test? Steam aging deliberately ages the surface finish so that the test reflects the solderability of parts after realistic storage periods. A finish that passes after one or eight hours of steam aging, as specified in J-STD-002, demonstrates resistance to oxidation and degradation over time, not merely as-plated performance.
What conditions are used for lead-free testing? Lead-free dip tests typically use SAC305 alloy with the bath temperature raised to approximately 250°C to 255°C, because the higher melting range of lead-free solder requires more thermal energy to achieve wetting equivalent to tin-lead processing.
What are the most common causes of test failure? Typical root causes include oxidized or tarnished terminations, organic contamination, insufficient or porous plating with inadequate barrier layers, expired or degraded surface finishes, poor underlayer metallization, and excessive storage time or humidity exposure before assembly.
Is the dip solderability test destructive? Yes. The immersion in molten solder and subsequent thermal exposure alter the specimen finish, so tested parts are normally not returned to production; sampling plans should account for the destructive nature of the test.